Clock Quality and Analysis of Phase Noise Measurement Methods
2019-03-05 | 10 min read
Oscilloscopes have started to become a viable option for measuring phase noise.
This post was written by guest author Yang Zou, Keysight's IoT solutions lead
In modern high-speed digital design, the clock signal is the ultimate source of system timing. The clock is used in both transmitter and receiver. It determines the timing of logic transition in transmitter and the time position of the sampling position point at the receiver. The reference clock can be recovered from the transmitted serial data in an undistributed clock system or transmit as a separate signal in a distributed clock system. The clock is reproduced in the clock recovery circuit, for example a PLL, at the receiver from reference clock.
Clock performance is critical to system performance and can be quantified by measuring clock jitter. Clock jitter is usually used to measure the quality of a clock and is analyzed under system-specific assumptions. For example, the restrictive requirement of PCIe Gen 5 is different when compared to SATA or USB 3.1. It will eventually reflect on BER under different limitation. Traditional clock specifications like peak-to-peak phase jitter, period jitter, and cycle-to-cycle jitter indicate clock quality but don’t answer the only truly relevant question: Will the clock work in the system you are designing?
The basic concept of phase noise involves frequency stability, which is defined as the degree to which an oscillating source produces the same frequency throughout a specific period of time. There are many ways to determine and quantify phase noise. The most common one is single side-band phase noise, ℒ(t), defined by US National Institute of Standard and Technology (NIST) as “the ratio of the power density at an offset frequency from the carrier to the total power of the carrier signal.”
Phase noise in frequency domain is characterized by Sφ(f), compared to frequency spectrum density of the clock, S(f), instead of square of the Fourier transform of the signal spectrum density, it’s the square of the Fourier transform of the phase noise. The phase noise frequency domain fφ, is related to the signal frequency domain f by fφ = f - fc. , ℒ(t)single side-band phase noise as described in the last paragraph is defined by ℒ(t) = 1/2 Sφ(f)
The most useful measurement of clock quality that has been provided is the phase noise spectrum. A simple way to determine whether or not a clock is adequate for an application is to apply a mask test to the phase noise spectrum. By requiring the phase noise fit under a mask, the amount of phase noise in different offset frequency bands can be limited.
Traditional ways to measure phase noise are direct spectrum, phase detector and cross correlations.
It’s one of the simplest methodologies to measure the phase noise if the inherent phase noise SSB of equipment at offset is significantly lower than the signal phase noise ℒ(t). The test setup is very simple. The signal is directly connected to a signal analyzer/spectrum analyzer and most modern signal analyzerswill conduct the analysis in software.
Phase noise measurements can be performed by using a phase detector to remove the carrier and just leave the phase noise signal from a golden clock or reference clock by shifting 90°. After a mixer and low passband filter (LPF), low noise amplifier, the signal analyzer will convert it into phase noise. This method provides great sensitivity and wide measurement coverage. This methodology is not sensitive to amplitude noise either. The system block diagram can be seen in Figure 1.
There are several different ways to implement this using the same concept, such as PLL method, which provides golden clock from the feedback circuit after LPF and a Phase Lock Loop (PLL). Another methodology is an analog delay line which requires splitting the input clock. One way to pass delay line and the other way to shift 90° and mix them or use digital discriminator method to handle the date in a DSP system.
To minimize the impact of internal noise generated by equipment channels, the DUT noise passes through multiple correlated channels. The noise from the clock is coherent and not affected by the cross-correlation. The noise generated by each channel is incoherent and is eliminated by the cross-correlation system. The architecture provides supreme measurement sensitivity without requiring exceptional performance hardware to reach high measurement result.
The architecture can be illustrated as figure 2. For the best test results, use the most accurate clock sources and metrology level accuracy can be reached. It will be a high performance and high cost solution.
The rapidly evolving mobile device, network and data center technology makes cellular site synchronization more challenging than ever before. 5G application such as massive MIMO, small cells, MDAS, RRH, BBU and fronthaul demand next level of phase and frequency accuracy. Optimized timing solution and the highest performance clock sources to support millimeter wave (mmWave) is expected. Beside accuracy, the quality of clock generator under higher CW and higher bandwidth characterization is expected and it becomes more critical.
PCIe is one of the most important high-speed digital buses and allows the user to use spread-spectrum clocking (SSC) to avoid electromagnetic interference (EMI) at specific frequency. This is achieved by modulating clock with another low frequency signal. However, it brings more challenges on phase noise analysis of the modulated clock.
The traditional ways of measuring clock phase noise are facing the challenge of frequency and offset range limitations, as is supporting SSC enabled clocks. So, using a scope to measure phase noise becomes an attaractive alternative.
Arguably, the sampling scope was first considered due to it's extremely clean phase noise floor. For example, Keysight 86100D and N1000A was considered a great performance instrument with intrinsic jitter is between 50 fs and 100 fs. It fits many applications except a wide offset case. There is a limitation in the hardware - the maximum offset is not enough in some applications.
In the past, a real-time scope was not considered because the jitter noise floor was not good enough compared to other equipment. However, the intrinsic jitter was improved significantly in recent years. Keysight Z series scope could provide 50 fs intrinsic jitter and the UXR lowers this number to 25 fs.
The new hardware gives the possibility to use a real-time scope to measure the phase noise of the signal. To make measurements more accurate, a noise reduced methodology was adopted. As Figure 3 illustrates, both polarities of differential signals from a PCIe evaluation board were connected to two channels of a scope directly. Figure 4 shows the comparison of the conventional way (purple waveform), noise reduced way (green waveform) and industry standard phase noise test equipment SSA (E5052B from Keysight technologies, yellow waveform). Noticeably, the noise reduced methodology offers results comparable with the industry standard.
5G is coming and clock quality is very important to 5G devices and base stations. This is especially true for mmWave technologies. There are different technologies to characteristize phase noise, which is one of the most important parameters. The advantage of the conventional ways such as direct spectrum, phase detector and cross-correlated were stated. However, the higher frequency and bandwidth demanded from 5G technologies and SSC enabled clocks require new tools. Real time scope-based solutions are a viable choice. As next step, we'll explore how to further improve the accuracy in more band and reduce test time. This will be significant process towards meeting the industry expectations and requirements for phase noise analysis.