Relief on the Search of Burst Errors

2021-01-19 | 5 min read

PAM4-based transmissions rely on digital equalization and forward error correction (FEC) to operate error-free. Standard consortia like the Institute of Electrical and Electronics Engineers (IEEE) or the Optical Internetworking Forum (OIF) define requirements that already include FEC in the test procedures to ensure interoperability between different components of a 400G link.

While FEC brings undisputed benefits, it also adds complexity in the design and dimensioning of 400G components and systems. Yes, FEC enables links with high “raw BER” (bit error ratio before error correction) to operate error-free. On the downside, the system margin cannot easily be monitored as the transition between an error-free system versus an inoperable system becomes narrow. In addition, FEC schemes such as RS(544,514) - also known as KP4 - used in 400GBASE interfaces are very sensitive to the nature of the bit errors. A link running at a raw BER of 2 x 10^-4 can be operated error-free with KP4 FEC as long as the bit errors are random. However, error bursts are frequent in 400G designs. They can originate from clock recovery units, multiplexers, digital equalizers such as DFE (error propagation) or as a result of degraded performance of the transmitter/ receiver optical subassembly (TROSA) at low frequencies, i.e. when a long sequence of identical symbols is transmitted or received. The KP4 FEC can correct up to 15 errored symbols in a 544 symbol codeword (10 bits are encoded in a symbol). After this limit, the entire codeword and the corresponding Ethernet packets are lost, having a catastrophic impact on the system performance. It is therefore mission critical to measure and characterize error bursts.

Monitoring the raw BER is not sufficient to characterize error bursts. As they happen rarely, they do not impact the BER which is an average metric. Looking at statistics such as the distribution of errors per codeword (see Figure 1) enables measurement of the system FEC margin, which describes how far the system is operating from the FEC limit.

Figure 1 FEC error per frame distribution

Capturing such statistics may be time consuming if burst error rate is low and does not provide enough information to make the design more robust. Understanding the mechanisms behind the error bursts unlocks designer insights into the system. For this Keysight has introduced a new feature for detecting, capturing and analyzing error bursts. This burst error detection feature is part of the M8070EDAB Error Distribution Analysis Package for M8000 Series BER Test Solutions. It allows the designer to:

measure the arrival rate of burst errors.
characterize burst error length and pattern-dependency.
understand the mechanisms leading to error bursts, which can depend on various parameters such as signal characteristics (amplitude, eye opening), impairments (jitter, random noise and inter-symbol interference) or environmental conditions (e.g. temperature variations).

This solution offers a flexible definition of burst errors at the bit, PAM4 symbol or FEC symbol levels (e.g. number of bit errors within M blocks of 544 bits).

Figure 2 Symbol burst captured on the 400GAUI-8 interface of an optical transceiver module analyzed with the M8070EDAB advanced distribution analysis package