Reduce Test Time from Hours to Minutes

2020-07-31 | 3 min read

Today’s hyperscale data centers stream terabits of data every second to enable cloud services for global communication. Accelerating the capacity for faster channels pushes the physical limitations of what copper can achieve. Optical fiber can assist long-haul sections of the network, but copper channels are at the core of critical switch fabric and routers. Poorly designed copper interconnects cause bit errors and ultimately crash networks.

Signal aberrations include reflections, skew, crosstalk, dielectric loss, and skin effect loss. Minimizing these anomalies is critical to maintaining properly functioning network channels. Ignoring them will bring a full network down.

Faster Data Rates Require New Measurement Techniques

Traditional test and measurement techniques are quickly becoming obsolete. Faster data rates with shorter risetime digital transitions create signal integrity failures inside the data center infrastructure and demand newer measurement science. To characterize a differential channel, traditional four-port VNA measurements require more than four hours of testing for a typical 32-channel connector device-under-test (DUT) assembly. Characterizing this DUT using a four-port VNA entails 64 measurements. By using a 32-port VNA, you can obtain all 1,024 S-parameters in a single measurement.

Figure 1: Keysight M9808A PXIe VNA with N1930B PLTS

Channel operating margin (COM) is an emerging figure of merit for high-speed digital channel design. The power of COM is that the system designer can trade off component margins as needed to maximize the performance / cost ratio of the complete channel.

By taking crosstalk into account after equalization, the channel designer can optimize overall data throughput using various transmitters and receivers in a design-of-experiments methodology. This process allows the system designer to make logical design trade-offs to save time and money without sacrificing performance. Modern testing methodologies ensure the rapid bandwidth escalation of today’s terabit networks, enabling the necessary exponential throughput predicted by Moore’s law.

Read the case study, Samtec Reduces R&D Lab Test Time from Four Hours to Five Minutes, to find out how Samtec reduced its instrument setup and test time by 98% and achieved 50% faster time to market for its next-gen 112 Gbps PAM4 interconnect solutions.