PCIe 5.0 Will Double the Throughput of PCIe 4.0 to Support 400GE in the Data Center
2019-03-14 | 4 min read
With the expectation of billions of internet-connected devices and data-intensive real-time applications, 100 gigabit Ethernet (GE) speeds that are common in data centers today will not be fast enough. As a result, data center operators need to migrate their networks from 100GE to 400GE. Faster networking speeds require faster memory and faster serial bus communications.
In parallel with transceiver upgrades to 400GE, data center operators must transition to the next generation of high-speed computing interfaces. Double date rate (DDR) memory will move from DDR 4.0 to DDR 5.0, and Peripheral Component Interconnect Express (PCI Express® or PCIe®) expansion bus will move from PCIe 4.0 to PCIe 5.0.
PCIe is a high-speed, differential, serial standard for point-to-point communications at the rack-level in a data center. Data center operators prefer to assign computing tasks to servers located in the same rack to avoid inundating the data center network with unnecessary traffic. The PCIe 5.0 standard is on a fast track for development as the PCI Special Interest Group (PCI-SIG®) — the standard body that defines the PCIe specifications — plans to complete the PCIe 5.0 standard in 2019.
PCIe 5.0 Will Double the Throughput of PCIe 4.0
Each new generation of the PCIe standard provides additional features and faster data transfer rates than the previous generation. PCIe 5.0 will double the throughput of PCIe 4.0. The transfer rate of PCIe 5.0 is 32 gigatransfers per second (GT/s) vs. the 16 GT/s supported by PCIe 4.0. With 64 gigabytes per second (GB/s) of unidirectional transfer bandwidth, PCIe 5.0 provides data throughput at 128 GB/s of bidirectional traffic. PCIe interconnect technology is the basis of development for many other rack-based data center technologies such as storage and graphics processing units (GPUs).
Although the PCI-SIG plans to finalize the PCIe 5.0 standard in 2019, it usually takes about a year for next-generation hardware to become available in the market. The adoption of PCIe 5.0 in the data center depends on support for the standard in the servers. Nevertheless, chipset and module manufacturers have already begun working on PCIe 5.0 devices.
The overwhelming concern for designers is interoperability and backward compatibility. Designers need tools to validate the parametric and protocol aspects of their designs to ensure performance and compliance to the standard.
Download the white paper The Fast Track to PCIe 5.0 to learn more about the design and test challenges introduced by PCIe 5.0.